A renderer schedules n passes (labeled 0..n-1). A directed edge u v means pass u must run before pass v. Among all valid orderings, output the lexicographically smallest one, comparing orderings as sequences of pass labels. If no valid ordering exists (the constraints contain a cycle), output CYCLE instead.
The lexicographically smallest order is obtained greedily: at each step, from all passes whose prerequisites are already scheduled, choose the one with the smallest label.
Input format
Line 1: two integers n and m — the number of nodes (labeled 0 through n-1) and the number of directed edges.
Each of the next m lines: two integers u v, a directed edge from to (read as: must come before ).
Output format
If a valid ordering exists, print the lexicographically smallest one as n space-separated labels on one line. Otherwise print CYCLE.
Constraints
- 1 <= n <= 2000
- 0 <= m <= 5000
- 0 <= u, v <= n-1